1. Field of Invention
The invention relates to gas cluster ion beam (GCIB) processing.
2. Description of Related Art
Typically, during fabrication of an integrated circuit (IC), semiconductor production equipment utilize a (dry) plasma etch process to remove or etch material along fine lines or within vias or contacts patterned on a semiconductor substrate. The success of the plasma etch process requires that the etch chemistry includes chemical reactants suitable for selectively etching one material while etching another material at a substantially lesser rate. Furthermore, the success of the plasma etch process requires that acceptable profile control may be achieved while applying the etch process uniformly to the substrate.
In present IC devices, Si-containing and Ge-containing materials are a mainstay in semiconductor processing. However, more exotic materials are also being introduced to semiconductor processing to improve various electrical properties of the IC devices. For example, in front-end-of-line (FEOL) semiconductor processing, high dielectric constant (high-k) materials are desirable for use as transistor gate dielectrics. Preliminary high-k materials used in this role were tantalum oxide and aluminum oxide materials. Currently, hafnium-based dielectrics and possibly lanthanum-based dielectrics are expected to enter production as gate dielectrics. Moreover, in FEOL semiconductor processing, metal-containing materials are desirable for use as transistor gate electrodes in future generations of electronic devices. Currently, metal electrodes containing Ti, Ta, and/or Al (e.g., TiN, TaN, Al2O3, and TiAl) are expected to enter production as metal electrodes. Of course, the introduction of new materials to semiconductor processing is not limited to only FEOL operations, but is also a trend in metallization processes for back-end-of-line (BEOL) operations. Moreover, in advanced memory devices, new and exotic materials are used and introduced, including Fe, Co, Ni, and alloys thereof, as well as noble metals.
With current materials and the advent of these new materials in electronic device processing, the ability to etch these current and new materials while maintaining the integrity of pre-existing layers and/or structures faces formidable challenges. Conventional etch processes may not achieve practical etch rates of these materials or attain an acceptable etch selectivity relative to underlying or overlying materials. Moreover, conventional etch processes may not achieve acceptable profile control that is uniformly applied across the substrate.